1. Field of the Invention
The present invention relates generally to decoders for subsampled video signals, and more particularly to a decoder for a sub-sampled video signal which is band compressed by interline offset subsampling. This invention has particular applicability to a MUSE decoder for a video signal which is band compressed based on Multiple Sub-nyquist Sampling Encoding (hereinafter referred to as MUSE). This invention relates more particularly to an improvement in an intrafield interpolation circuit for decoding a motion picture provided in the MUSE decoder.
2. Description of the Background Art
Various television broadcastings for transmitting high-quality video have been proposed in recent years. Nippon Hoso Kyokai (NHK) in Japan has proposed a high-definition television system called High-vision. According to the standard of this high vision, the number of scanning lines is 1125, a field frequency is 60 Hz, an interlace ratio is 2:1, and a length-to-breadth ratio of a picture is 9:16. A baseband signal of this high vision signal has a bandwidth of 22 MHz for a luminance signal and 7 MHz for each of two color difference signals (R-Y, B-Y).
Since the high vision signal includes signal components of a wide band, it cannot be transmitted as it is by using a bandwidth (27 MHz) on one channel of an usual satellite broadcasting. Therefore, NHK has proposed a band compressed transmission system for converting the high vision signal into an 8 MHz signal. This band compressed transmission system is called Multiple Sub-nyquist Sampling Encoding (MUSE system). An application of this MUSE system enables the bandwidth of the high vision signal to be compressed to 8 MHz and thus be transmitted on one channel band of the satellite broadcasting. A general description concerning with the MUSE system is disclosed, for example, in U.S. Pat. No. 4,692,811 assigned to Ninomiya et al on Sept. 8, 1987. In addition, another description with the MUSE system is found in an article entitled "MUSE: Transmission System of High Vision Broadcast via Satellite" in Nikkei Electronics, Nov. 2, 1987, pp. 189-212. As described in those articles, it is noticed that the MUSE system is a band compression technology employing correlation properties of a video signal.
FIG. 1 shows sampling points of the high vision signal and those points in each field thereof. In this figure, marks of a hollow circle ( ), a hollow square ( ), a solid circle ( ) and a solid square ( )represent sampling points in the 4n-th, the (4n+1)-th, the (4n+2)-th and the (4n +3)-th fields, respectively. T.sub.0 represents a sampling interval, which corresponds to the reciprocal of a transmission sampling rate (16.2 MHz). In sampling the high vision signal, a sampling phase is offset between any fields, any frames and any lines so that the sampling points do not overlap one another between fields, frames and between lines. That is, the sampling phase is controlled so as to be circulated every four fields, so that a MUSE signal is generated by sampling of the high vision signal.
A MUSE decoder for decoding this MUSE signal to the original high vision signal carries out different processings for a signal in a still picture portion and a signal in a motion picture portion.
In the processing of the still picture portion, since a picture has a correlation between any fields and between any frames, a pixel which is lacking between any pixels being transmitted at present is interpolated based on a pixel one field before, a pixel one frame before and a pixel three fields before. That is, a video in the still picture portion is reproduced based on the MUSE signal to be inputted during the four-field period.
Meanwhile, in the processing of the signal in the motion picture portion, there exists no correlation with time, i.e., no correlation between any fields and between any frames. Thus, a reproduction is carried out only with pixel data at a sampling point in the field, which is being transmitted at present. In addition, the pixel lacking between the pixels being transmitted at present is interpolated utilizing a correlation between lines, namely, pixels on at least the upper and lower lines.
The signal processing in the conventional MUSE decoder as described above will now be described with reference to FIGS. 2 and 3. FIG. 2 shows a MUSE signal transmission system, and FIG. 3 is a schematic diagram of the MUSE decoder, which is simplified to facilitate the description thereof.
Referring to FIG. 3, the MUSE decoder comprises a MUSE signal input terminal 10, an 8.15 MHz low-pass filter 11, an A/D converter 12 for sampling pixel data in response to a clock signal of 16.2 MHz, a still picture processing circuit 13, a motion picture processing circuit 17, a motion detecting circuit 20, a mixing circuit 21, a TCI decoder 22, and a synchronization/control signal detection circuit 23. The still picture processing circuit 13 comprises an interframe interpolation circuit 14, a sampling frequency converting circuit 15, and an interfield interpolation circuit 16. The motion picture processing circuit 17 comprises an intrafield interpolation circuit 18 and a sampling frequency converting circuit 19.
The mixing circuit 21 mixes a signal from the still picture processing circuit 13 and a signal from the motion picture processing circuit 17. A mixing ratio thereof varies depending on the amount of motion of a video detected by the motion detection circuit 20. A high vision signal is outputted through the TCI decoder 21. The synchronization/control signal detection circuit 23 carries out (a) detecting a horizontal/vertical synchronizing signal, (b) generating clock signals with various frequencies (16.2 MHz, 32.4 MHZ, 48.6 MHz and the like), (c) detecting control signals having motion vector data or the like shown in Table 1 in the following, and (d) generating a control signal and a clock signal of each circuit based on the detection of those control signals.
TABLE 1 ______________________________________ BIT NO. CONTENT OF CONTROL ______________________________________ 1 Interfield subsampling (1: when sampling points phase (Y) are on the right) 2 Horizontal motion (Positive: when the vector (2') picture shifts to the right) 3 #2, LSB 4 ICK unit of 32 MHz 5 6 Vertical motion (Positive: when the vector (2') picture shifts downwards) 7 #6, LSB 8 Line unit 9 Y subsampling phase (1: when sampling points are on the right on odd number lines) 10 C subsampling phase (1: when the value of line #2 (fraction is discarded) is an odd number and sampling points are on the left) 11 Noise reduction is carried out in response to the value of 12 noise reduction control 13 Interlace flag 14 Motion detection (1: when the lower sensitivity control (1) sensitivity is selected) 15 Motion detection sensitivity control (2) 16 0: normal 17 Motion information 1: completely still picture 2: not completely still picture 18 3.about.7: the degree of motion 19 None 20 AM/FM (1: AM, no emphasis) 21 Spare .intg. 32 ______________________________________
After the MUSE signal inputted is converted to digital data by the A/D converter 12, the still picture processing circuit 13 and the motion picture processing circuit 17 carry out decoding for a still picture and a motion picture, respectively. Output signals from these circuits 13 and 17 are mixed together at the mixing circuit 21 depending on the amount of motion detected by the motion detection circuit 20. An output signal of this mixing circuit 21 is applied to the TCI decoder 22, so that the TCI decoder 22 outputs a high vision signal.
FIG. 4 shows one example of the interframe interpolation circuit 14 and the intrafield interpolation circuit 18 in the conventional MUSE decoder. In this example, the processing at the intrafield interpolation circuit 18 is time-consuming. Therefore, in order to correct a large deviation between the timings of signals in the still picture processing circuit 13 and the motion picture processing circuit 17, an output signal of the interframe interpolation circuit 14 is delayed through one-line memories 24a and 24b in the intrafield interpolation circuit 18, so that a signal, the timing of which is controlled by this delay, is outputted to the sampling frequency converting circuit 15.
Referring to FIG. 4, a pixel signal Sa in the present field as shown in FIG. 5 is inputted into a terminal a of a switch S1 for interframe interpolation. Meanwhile, a signal Sb in which pixel signals two frames before are interpolated between pixel signals one frame before as shown in FIG. 5, is inputted into the other terminal b of the switch S1. The switch S1 operates responsive to an output signal from an EXOR circuit 39 to output a signal Sc in which the pixel signals included in the signal Sa are interpolated between the pixel signals one frame before in place of the pixel signals two frames before. A frame memory 26 for delaying the input signal Sc by approximately one frame period is provided in the interframe interpolation circuit 14. The frame memory 26 comprises field memories 27 and 28 each constituting one field delay circuit. This one-field memory 28 has its delay time controlled responsive to a motion vector signal in order to correct a motion vector.
A motion detecting circuit 20' receives the respective signals in the present frame, one frame before and two frames before. As mentioned above, since the sampling points of the MUSE signal are circulated every two frames (four fields), the motion detecting circuit 20, detects a motion by comparing the pixel signals in the present frame and those two frames before (the detection of the difference in motion between every two frames). Since the motion detection is incomplete only by detecting the difference between every two frames, the detection circuit 20' also detects a motion by comparing the pixel signals in the present frame with those one frame before. This motion detection between any frames is carried out by comparing signal components equal to or less than 4.2 MHz, which have no folding distortion generated by sub-sampling in the still picture. The signals, which represent the amount of motion detected by these two motion detecting operations, are applied to the mixing circuit 21, and the mixing ratio is controlled as described above.
The clock signal of 16.2 MHz is applied to the EX-OR circuit 39 through an input terminal 29. A phase control signal for interpolating the pixel signals in the present frame in place of the pixel signals two frames before by the switch S1 is applied to the EX-OR circuit 39 through the other terminal 30. This phase control signal is generated in the synchronization/control signal detecting circuit 23 in response to 9th bit data in a control signal and a horizontal/vertical synchronizing signal.
As is known, the intrafield interpolation circuit 18' of the MUSE decoder produces pixels lacking between the transmitted pixels by filtering and also filters the transmitted pixels, resulting in an enhancement in the degree of freedom in a frequency characteristic of a video signal. This intrafield interpolation circuit 18' comprises line memories 24a, 24b, 24c and 24d for one horizontal scanning period (1H) delay, switches S2a, S2b, S2c, S2d and S2e for selecting the pixel signals in the present frame and inserting a ground signal (0 signal) in place of the pixel signals one frame before, and one-dimensional transversal filters 32a, 32b, 32c, 32d and 32e. These one-dimensional transversal filters 32a-32e are identical in their configurations, but different from one another only in their tap coefficients a11-a54, b11-b53 to be set. The transversal filter 32a comprises delay elements 33a-33f for delaying by a time period corresponding to one pixel. Each of these unit delay elements 33a-33f is constituted by a D type flip-flop (D-FF). The transversal filter 32a further comprises multipliers 34a-34g to which different tap coefficient (a11, b11, a12, b12, a13, b13, a14) are provided, respectively. These multipliers 34a-34g are each in general constituted by an ROM. Outputs of all the multipliers 34a-34g are connected to an adder 35.
Outputs of all the one-dimensional transversal filters 32a-32e are connected to an adder 36. An output signal is outputted through a terminal 37 to the sampling frequency converting circuit 19 for motion picture signal processing. A signal is outputted along an output line L1 and through an output terminal 38 to the sampling frequency converting circuit 15 for still picture signal processing.
FIG. 6 shows an equivalent circuit of the intrafield interpolation circuit 18. Referring to FIG. 6, one switch S3 for inserting a 0 signal is provided equivalently at an input stage of the intrafield interpolation circuit 18'. That is, although only one 0 signal inserting switch S3 is required, two one-line memories (not shown) are separately required for controlling the timing of an output signal of the interframe interpolation circuit 14, namely for delaying by two horizontal scanning periods.
An operation of the intrafield interpolation circuit 18' will now be described with reference to FIGS. 4-7. In FIG. 7, pixels to be inputted are shown; the pixels in the present frame are denoted with hollow circles , while pixels of the 0 signal obtained by grounding the switch S3 are denoted with the solid circles.
The intrafield interpolation circuit 18' interpolates pixel signals at the positions of the solid circles by two-dimensional filtering and also filters the pixels in the present frame. This intrafield interpolation circuit 18' comprises a two-dimensional filter circuit in five rows in a vertical direction and in seven columns in a horizontal direction, as will be recognized by FIGS. 4 and 6. The switch S3 causes a 0 signal to be inserted in pixel signals other than the pixel signals in the present frame.
The one-dimensional transversal filters 32a-32e and line memories 24a-24d operate responsive to a clock signal of 32.4 MHz. Thus, at the point when the present frame pixels exist at the central position (CENTER) of FIG. 4 or FIG. 6, 0-inserted pixels are placed in the respective multipliers 34a, 34c, 34e, 34g and the like to which the tap coefficients a11-a54 are provided, respectively. Consequently, the filtering is carried out employing the tap coefficients b11-b53 at this time.
Meanwhile, at the point when 0-inserted pixels are placed at the central position (CENTER), the 0-inserted pixels are placed in the respective multipliers 34b, 34d, 34f and the like with the tap coefficients b11-b53, respectively. This means that the filtering is carried out employing the tap coefficients a11-a54.
For example, an operation for interpolating a 0-inserted pixel S33 of FIG. 7 is expressed as follows. ##EQU1##
An operation for filtering a present frame pixel S34 is expressed as follows. ##EQU2##
In the above described intrafield interpolation processing, the switches S2a-S2e of FIG. 4 or the switch S3 of FIG. 6 operates, so that a 0 signal is inserted in the present frame pixels (denoted with the solid circles of FIG. 7.)
An operation speed (a frequency of a clock signal) of the circuit is 30 nsec (32.4 MHz), and thus the operation speed and operation responsiveness must be enhanced. In addition, since data of the 0-inserted pixels must also be delayed, increased capacities of the line memories 24a-24d are required. That is, in the conventional, since the operation speed of the intrafield interpolation circuit is high, RAMs constituting the delay line memories 24a-24d and ROMs constituting the tap coefficient multipliers 34a-34g should be operated at high speed. Capacities of the RAMs are also required to be increased.
It is strongly desirable to implement the intrafield interpolation circuit in IC for a practical application of the MUSE decoder. For this implementation in IC, an area occupied by a RAM portion requiring a large area is preferably reduced. Furthermore, the operation speed of the circuit is preferably decreased for enhancing the reliability of the interpolation processing. Therefore, it is desirable that the memory capacity and the operation speed are reduced in the intrafield interpolation circuit 18.
A circuit of FIG. 8A is known as a general intrafield interpolation circuit of a video signal. This intrafield interpolation circuit comprises, similarly to the circuit shown in FIG. 5, the switch S3 for 0 insertion. Further, a circuit shown in FIG. 8B is known as a general interpolation circuit which carries out an equivalent processing to the circuit in FIG. 8A and has lower operation speed and smaller memory capacity than the circuit in FIG. 8A.
Employing this circuit of FIG. 8B as the intrafield interpolation circuit of the MUSE decoder enables the operation speed of the intrafield interpolation circuit to be reduced. However, the MUSE signal is, as shown in FIG. 1, inverted in sampling phase between any lines and between any frames. Thus, timing should be adjusted in accordance with the characteristics of the MUSE signal which varies this sampling phase for the application of the circuit of FIG. 8B to the MUSE decoder.
This relationship will be described in more detail with reference to FIGS. 9A and 9B. Each of the signals shown in FIGS. 9A and 9B corresponds to a signal on each node in the circuits shown in FIGS. 8A and 8B. Comparing FIG. 9A with FIG. 9B, the sampling phase is different from each other as seen from a waveform of a signal Sy. When the circuit shown in FIG. 8A is employed, a preferable output signal Sol (a signal in which hatched signal portions are inserted) is obtained in either case of FIG. 9A or 9B. However, when the circuit shown in FIG. 8B is employed, a preferable output signal So2 is obtained in the case shown in FIG. 9A, while a non-preferable signal So2 is outputted in the case in FIG. 9B. This means that the circuit in FIG. 8B is applied as the intrafield interpolation circuit as it is. Even in the case that the circuit in FIG. 8B is employed, a signal So2' with a waveform shown in FIG. 9B should be outputted.
The prior art of particular interest to this invention is seen in Japanese Patent Laying-Open No. 62-189886, which discloses a subsampling filter circuit for the MUSE decoder. This subsampling filter circuit directly applies a circuit similar to the one shown in FIG. 8B, and hence it is noticed that the problems described in FIGS. 9A and 9B arise.